VLSI test principles and architectures : design for testability (Record no. 13710)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00311nam a22001217a 4500 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| ISBN | 9780123705976 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.395 |
| Item number | WAN |
| 100 ## - MAIN ENTRY--AUTHOR NAME | |
| Personal name | Wang, Laung-Terng |
| 245 ## - TITLE STATEMENT | |
| Title | VLSI test principles and architectures : design for testability |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication | New York |
| Name of publisher | Elsevier |
| Year of publication | 2006 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Number of Pages | 777 p. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Collection code | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Full call number | Accession Number | Koha item type |
|---|---|---|---|---|---|---|---|---|---|
| ECE | Mahindra University VNLRC | Mahindra University VNLRC | General Stacks | 24/03/2023 | SBH | 5808.00 | 621.395 WAN | 15911 | Reference |