Vineet Nayyar Learning Resource Centre
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VLSI physical design: from graph partitioning to timing closure

By: Material type: TextTextPublication details: Springer -- Switzerland -- 2022Edition: 2nd edDescription: xvii, 317pISBN:
  • 9783030964177
Subject(s): DDC classification:
  • 621.395 KAH
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Item type Current library Collection Call number Status Date due Barcode
Books Books Mahindra University VNLRC General Stacks ECE 621.395 KAH (Browse shelf(Opens below)) Checked out 26/05/2026 20785

- 1 Introduction.

- 2 Netlist and System Partitioning.

- 3 Chip Planning.

- 4 Global and Detailed Placement.

- 5 Global Routing.

- 6 Detailed Routing.

- 7 Specialized Routing.

- 8 Timing Closure.

- A Solutions to Chapter Exercises.

- B Example CMOS Cell Layouts.

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